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86
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DAC
2002
ACM
16 years 2 months ago
River PLAs: a regular circuit structure
A regular circuit structure called a River PLA and its reconfigurable version, Glacier PLA, are presented. River PLAs provide greater regularity than circuits implemented with sta...
Fan Mo, Robert K. Brayton
FCCM
1999
IEEE
134views VLSI» more  FCCM 1999»
15 years 6 months ago
Runlength Compression Techniques for FPGA Configurations
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
Scott Hauck, William D. Wilson
RECOSOC
2007
160views Hardware» more  RECOSOC 2007»
15 years 3 months ago
Stack processor architecture and development methods suitable for dependable applications
Nowadays, reconfigurable and multiprocessor systems are becoming increasingly attractive for many applications. Such systems should be more and more dependable especially if error...
Mehdi Jallouli, Camille Diou, Fabrice Monteiro
SAMOS
2007
Springer
15 years 8 months ago
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and
Abstract— This paper explores the resistance of MOS Current Mode Logic (MCML) against Differential Power Analysis (DPA) attacks. Circuits implemented in MCML, in fact, have uniqu...
Francesco Regazzoni, Stéphane Badel, Thomas...
96
Voted
ISCAS
2003
IEEE
153views Hardware» more  ISCAS 2003»
15 years 7 months ago
A VLSI model of range-tuned neurons in the bat echolocation system
The neural computations that support bat echolocation are of great interest to both neuroscientists and engineers, due to the complex and extremely time-constrained nature of the ...
Matthew Cheely, Timothy K. Horiuchi