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ET
2007
101views more  ET 2007»
14 years 10 months ago
Towards Nanoelectronics Processor Architectures
In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliab...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
MICRO
2006
IEEE
159views Hardware» more  MICRO 2006»
14 years 10 months ago
MRF Reinforcer: A Probabilistic Element for Space Redundancy in Nanoscale Circuits
Shrinking devices to the nanoscale, increasing integration densities, and reducing of voltage levels down to the thermal limit, all conspire to produce faulty systems. Frequent oc...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
PPL
2008
185views more  PPL 2008»
14 years 10 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
RPTEL
2006
96views more  RPTEL 2006»
14 years 10 months ago
Supporting Self-Directed Learners and Learning Communities with Sociotechnical Environments
Making learning part of life is an essential challenge for inventing the future of our societies. Lifelong learning is a necessity rather than a possibility or a luxury to be cons...
Gerhard Fischer, Masanori Sugimoto
SIGMETRICS
2008
ACM
128views Hardware» more  SIGMETRICS 2008»
14 years 10 months ago
Loss-aware network coding for unicast wireless sessions: design, implementation, and performance evaluation
Local network coding is growing in prominence as a technique to facilitate greater capacity utilization in multi-hop wireless networks. A specific objective of such local network ...
Shravan K. Rayanchu, Sayandeep Sen, Jianming Wu, S...
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