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» A Modal Model of Memory
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IPPS
2002
IEEE
15 years 8 months ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
137
Voted
TSMC
2002
119views more  TSMC 2002»
15 years 3 months ago
Scene analysis by integrating primitive segmentation and associative memory
Scene analysis is a major aspect of perception and continues to challenge machine perception. This paper addresses the scene-analysis problem by integrating a primitive segmentatio...
DeLiang L. Wang, Xiuwen Liu
125
Voted
JCNS
2008
78views more  JCNS 2008»
15 years 2 months ago
A computational study of synaptic mechanisms of partial memory transfer in cerebellar vestibulo-ocular-reflex learning
There is a debate regarding whether motor memory is stored in the cerebellar cortex, or the cerebellar nuclei, or both. Memory may be acquired in the cortex and then be transferred...
Naoki Masuda, Shun-ichi Amari
120
Voted
IWMM
2004
Springer
90views Hardware» more  IWMM 2004»
15 years 9 months ago
Automatic heap sizing: taking real memory into account
Heap size has a huge impact on the performance of garbage collected applications. A heap that barely meets the application’s needs causes excessive GC overhead, while a heap tha...
Ting Yang, Matthew Hertz, Emery D. Berger, Scott F...
CAV
2008
Springer
96views Hardware» more  CAV 2008»
15 years 5 months ago
Implied Set Closure and Its Application to Memory Consistency Verification
Hangal et. al. [3] have developed a procedure to check if an instance of the execution of a shared memory multiprocessor program, is consistent with the Total Store Order (TSO) mem...
Surender Baswana, Shashank K. Mehta, Vishal Powar