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» A Modal Model of Memory
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CF
2009
ACM
15 years 12 months ago
A light-weight fairness mechanism for chip multiprocessor memory systems
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Magnus Jahre, Lasse Natvig
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
15 years 11 months ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood
148
Voted
ISCA
2010
IEEE
239views Hardware» more  ISCA 2010»
15 years 10 months ago
Sentry: light-weight auxiliary memory access control
Light-weight, flexible access control, which allows software to regulate reads and writes to any granularity of memory region, can help improve the reliability of today’s multi...
Arrvindh Shriraman, Sandhya Dwarkadas
181
Voted
HPCA
1999
IEEE
15 years 9 months ago
Limits to the Performance of Software Shared Memory: A Layered Approach
Much research has been done in fast communication on clusters and in protocols for supporting software shared memory across them. However, the end performance of applications that...
Angelos Bilas, Dongming Jiang, Yuanyuan Zhou, Jasw...
ESA
1998
Springer
162views Algorithms» more  ESA 1998»
15 years 9 months ago
External Memory Algorithms
Abstract. Data sets in large applications are often too massive to t completely inside the computer's internal memory. The resulting input output communication or I O between ...
Jeffrey Scott Vitter