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» A Modal Model of Memory
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VLSID
2002
IEEE
127views VLSI» more  VLSID 2002»
16 years 4 months ago
Switching Activity Estimation of Large Circuits using Multiple Bayesian Networks
Switching activity estimation is a crucial step in estimating dynamic power consumption in CMOS circuits. In [1], we proposed a new switching probability model based on Bayesian N...
Sanjukta Bhanja, N. Ranganathan
VLSID
2001
IEEE
129views VLSI» more  VLSID 2001»
16 years 4 months ago
Design Of Provably Correct Storage Arrays
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
Rajiv V. Joshi, Wei Hwang, Andreas Kuehlmann
225
Voted
VLDB
2005
ACM
123views Database» more  VLDB 2005»
16 years 4 months ago
Querying XML streams
Efficient querying of XML streams will be one of the fundamental features of next-generation information systems. In this paper we propose the TurboXPath path processor, which acce...
Vanja Josifovski, Marcus Fontoura, Attila Barta
EWSN
2007
Springer
16 years 4 months ago
Multithreading Optimization Techniques for Sensor Network Operating Systems
While a multithreading approach provides a convenient sensor application developing environment with automatic control flow and stack managment, it is considered to have a larger d...
Hyoseung Kim, Hojung Cha
ICCD
2001
IEEE
110views Hardware» more  ICCD 2001»
16 years 1 months ago
Low-Energy DSP Code Generation Using a Genetic Algorithm
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm bas...
Markus Lorenz, Rainer Leupers, Peter Marwedel, Tho...