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» A Modal Model of Memory
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ESA
2009
Springer
149views Algorithms» more  ESA 2009»
15 years 10 months ago
Sparse Cut Projections in Graph Streams
Finding sparse cuts is an important tool for analyzing large graphs that arise in practice, such as the web graph, online social communities, and VLSI circuits. When dealing with s...
Atish Das Sarma, Sreenivas Gollapudi, Rina Panigra...
FMCAD
2009
Springer
15 years 10 months ago
Scaling VLSI design debugging with interpolation
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...
Brian Keng, Andreas G. Veneris
ICCS
2009
Springer
15 years 10 months ago
Improving the Scalability of SimGrid Using Dynamic Routing
Research into large-scale distributed systems often relies on the use of simulation frameworks in order to bypass the disadvantages of performing experiments on real testbeds. SimG...
Silas De Munck, Kurt Vanmechelen, Jan Broeckhove
OOPSLA
2009
Springer
15 years 10 months ago
The design of a task parallel library
The Task Parallel Library (TPL) is a library for .NET that makes it easy to take advantage of potential parallelism in a program. The library relies heavily on generics and delega...
Daan Leijen, Wolfram Schulte, Sebastian Burckhardt
ASPDAC
2009
ACM
212views Hardware» more  ASPDAC 2009»
15 years 10 months ago
Timing analysis and optimization implications of bimodal CD distribution in double patterning lithography
Abstract— Double patterning lithography (DPL) is in current production for memory products, and is widely viewed as inevitable for logic products at the 32nm node. DPL decomposes...
Kwangok Jeong, Andrew B. Kahng