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CODES
2000
IEEE
15 years 4 months ago
Towards a new standard for system-level design
—Huge new design challenges for system-on-chip (SoC) are the result of decreasing time-to-market coupled with rapidly increasing gate counts and embedded software representing 50...
Stan Y. Liao
DAGSTUHL
2006
15 years 1 months ago
A Petri Net Approach to Verify and Debug Simulation Models
Verification and Simulation share many issues, one is that simulation models require validation and verification. In the context of simulation, verification is understood as the ta...
Peter Kemper, Carsten Tepper
IWMM
2011
Springer
254views Hardware» more  IWMM 2011»
14 years 2 months ago
Short-term memory for self-collecting mutators
We propose a new memory model called short-term memory for managing objects on the heap. In contrast to the traditional persistent memory model for heap management, objects in sho...
Martin Aigner, Andreas Haas, Christoph M. Kirsch, ...
ICFEM
2004
Springer
15 years 5 months ago
Timed Patterns: TCOZ to Timed Automata
Abstract. The integrated logic-based modeling language, Timed Communicating Object Z (TCOZ), is well suited for presenting complete and coherent requirement models for complex real...
Jin Song Dong, Ping Hao, Shengchao Qin, Jun Sun 00...
SAFECOMP
2010
Springer
14 years 10 months ago
Reliability Analysis of Safety-Related Communication Architectures
Abstract. In this paper we describe a novel concept for reliability analysis of communication architectures in safety-critical systems. This concept has been motivated by applicati...
Oliver Schulz, Jan Peleska