12 search results - page 2 / 3 » A Model for Hardware Realization of Kernel Loops |
RTCSA
1995
IEEE
13 years 9 months ago
1995
IEEE
: An essential building-block for construction of future real-time computer systems (RTCS’s) is a timeliness-guaranteed operating system. The first co-author recently formulated ...
ICCAD
1994
IEEE
13 years 10 months ago
1994
IEEE
We present an improved data model that reflects the whole VLSI design process including bottom-up and topdown design phases. The kernel of the model is a static version concept th...
PACS
2000
Springer
13 years 9 months ago
2000
Springer
Dynamic voltage and frequency scaling has been identified as one of the most effective ways to reduce power dissipation. This paper discusses a compilation strategy that identifies...
SCOPES
2004
Springer
13 years 11 months ago
2004
Springer
New embedded signal processing architectures are emerging that are composed of loosely coupled heterogeneous components like CPUs or DSPs, specialized IP cores, reconfigurable uni...
IEEEPACT
2006
IEEE
14 years 9 days ago
2006
IEEE
This paper describes a compiler for stream programs that efficiently schedules computational kernels and stream memory operations, and allocates on-chip storage. Our compiler uses...