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IPPS
2006
IEEE
15 years 5 months ago
Selection of instruction set extensions for an FPGA embedded processor core
A design process is presented for the selection of a set of instruction set extensions for the PowerPC 405 processor that is embedded into the Xilinx Virtex Family of FPGAs. The i...
Brian F. Veale, John K. Antonio, Monte P. Tull, S....
86
Voted
ENC
2007
IEEE
15 years 6 months ago
A MDA tool for the development of service-oriented component-based applications
This paper presents a process for the development of a Model-Driven Architecture (MDA) tool for the construction of service-oriented component-based applications. The process is u...
Nestor Riba, Humberto Cervantes
WETICE
2005
IEEE
15 years 5 months ago
Application of Lightweight Formal Methods to Software Security
Formal specification and verification of security has proven a challenging task. There is no single method that has proven feasible. Instead, an integrated approach which combines...
David P. Gilliam, John D. Powell, Matt Bishop
92
Voted
ASAP
2006
IEEE
168views Hardware» more  ASAP 2006»
15 years 3 months ago
Dual-Processor Design of Energy Efficient Fault-Tolerant System
A popular approach to guarantee fault tolerance in safety-critical applications is to run the application on two processors. A checkpoint is inserted at the completion of the prim...
Shaoxiong Hua, Pushkin R. Pari, Gang Qu
MICRO
1992
IEEE
133views Hardware» more  MICRO 1992»
15 years 3 months ago
Code generation schema for modulo scheduled loops
Software pipelining is an important instruction scheduling technique for efficiently overlapping successive iterations of loops and executing them in parallel. Modulo scheduling i...
B. Ramakrishna Rau, Michael S. Schlansker, Parthas...