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» A Network Congestion-Aware Memory Controller
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DSN
2000
IEEE
15 years 4 months ago
Executable Assertions for Detecting Data Errors in Embedded Control Systems
In order to be able to tolerate the effects of faults, we must first detect the symptoms of faults, i.e. the errors. This paper evaluates the error detection properties of an erro...
Martin Hiller
COMCOM
2008
131views more  COMCOM 2008»
14 years 11 months ago
CORA: Collaborative Opportunistic Recovery Algorithm for loss controlled, delay bounded ad hoc multicast
In this paper, we present Collaborative Opportunistic Recovery Algorithm (CORA) designed for multicast multimedia applications with low loss as well as latency constraints in ad h...
Yunjung Yi, Jiejun Kong, Mario Gerla, Joon-Sang Pa...
NPL
2006
137views more  NPL 2006»
14 years 11 months ago
Minimal Structure of Self-Organizing HCMAC Neural Network Classifier
The authors previously proposed a self-organizing Hierarchical Cerebellar Model Articulation Controller (HCMAC) neural network containing a hierarchical GCMAC neural network and a ...
Chih-Ming Chen, Yung-Feng Lu, Chin-Ming Hong
CSREAPSC
2006
15 years 1 months ago
Design and Implementation of SONICA (Service Oriented Network Interoperability for Component Adaptation) for Multimedia Pervasiv
Abstract - Recent advances in multimedia network systems have led to the development of a new generation of applications that associate the use of various multimedia objects. The c...
Hiroshi Hayakawa, Takahiro Koita, Kenya Sato
INFOCOM
1995
IEEE
15 years 3 months ago
Measuring the Performance of Parallel Message-Based Process Architectures
Message-based process architectures are widely regarded as an effective method for structuring parallel protocol processing on shared memory multi-processor platforms. A message-b...
Douglas C. Schmidt, Tatsuya Suda