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» A Network Processor Based Passive Measurement Node
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FCCM
2006
IEEE
113views VLSI» more  FCCM 2006»
15 years 10 months ago
GraphStep: A System Architecture for Sparse-Graph Algorithms
— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
Michael DeLorimier, Nachiket Kapre, Nikil Mehta, D...
DCOSS
2006
Springer
15 years 8 months ago
Evaluating Local Contributions to Global Performance in Wireless Sensor and Actuator Networks
Wireless sensor networks are often studied with the goal of removing information from the network as efficiently as possible. However, when the application also includes an actuato...
Christopher J. Rozell, Don H. Johnson
ISPAN
2002
IEEE
15 years 9 months ago
Fault-Tolerant Routing on the Star Graph with Safety Vectors
The concept of safety vector can guide efficient fault-tolerant routing on interconnection networks. The safety vector on the hypercube is based on the distance of a pair of nodes...
Sheng-I Yeh, Chang-Biau Yang, Hon-Chan Chen
CN
2006
84views more  CN 2006»
15 years 4 months ago
Dynamic overlay routing based on available bandwidth estimation: A simulation study
Dynamic overlay routing has been proposed as a way to enhance the reliability and performance of IP networks. The major premise is that overlay routing can bypass congestion, tran...
Yong Zhu, Constantinos Dovrolis, Mostafa H. Ammar
JSA
2010
158views more  JSA 2010»
14 years 11 months ago
Scalable mpNoC for massively parallel systems - Design and implementation on FPGA
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
Mouna Baklouti, Yassine Aydi, Philippe Marquet, Je...