497 search results - page 13 / 100 » A Network on Chip Architecture and Design Methodology |
113
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ISCA
2008
IEEE
15 years 6 months ago
2008
IEEE
As the number of cores per die increases, be they processors, memory blocks, or custom accelerators, the on-chip interconnect the cores use to communicate gains importance. We beg...
116
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CISIS
2009
IEEE
2009
IEEE
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
15 years 6 months ago
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
123
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PPL
2008
14 years 11 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
109
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DAC
2003
ACM
16 years 21 days ago
2003
ACM
In the way they cope with variability, present-day methodologies are onerous, pessimistic and risky, all at the same time! Dealing with variability is an increasingly important as...
106
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SUTC
2008
IEEE
15 years 6 months ago
2008
IEEE
— In this paper we discuss the design methodology based on the service-oriented architecture and agile development principles for wireless embedded and sensor networks (WSNs). Th...