497 search results - page 29 / 100 » A Network on Chip Architecture and Design Methodology |
100
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HPCA
2008
IEEE
16 years 7 days ago
2008
IEEE
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
110
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SLIP
2004
ACM
15 years 5 months ago
2004
ACM
Throughput, power consumption, signal integrity, pin count and routing complexity are all increasingly important interconnect issues that the system designer must deal with. Recen...
ICCD
2006
IEEE
15 years 8 months ago
2006
IEEE
—Network-on-Chip (NoC) has been proposed as an attractive alternative to traditional dedicated wires to achieve high performance and modularity. Power efficiency is one of the mo...
108
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DAC
1997
ACM
15 years 3 months ago
1997
ACM
We present our experiences with the formal verification of an automotive chip used to control the safety features in a car. We used a BDD based model checker in our work. We descr...
DAC
2007
ACM
16 years 26 days ago
2007
ACM
Off-chip decoupling capacitor (decap) allocation is a demanding task during package and chip codesign. Existing approaches can not handle large numbers of I/O counts and large num...