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» A Network on Chip Architecture and Design Methodology
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DAC
2010
ACM
15 years 3 months ago
Networks on Chips: from research to products
Research on Networks on Chips (NoCs) has spanned over a decade and its results are now visible in some products. Thus the seminal idea of using networking technology to address th...
Giovanni De Micheli, Ciprian Seiculescu, Srinivasa...
VLSID
2002
IEEE
128views VLSI» more  VLSID 2002»
16 years 7 days ago
System-Level Point-to-Point Communication Synthesis using Floorplanning Information
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
Jingcao Hu, Yangdong Deng, Radu Marculescu
GLOBECOM
2009
IEEE
15 years 3 months ago
Efficient Multicast Support in Buffered Crossbars using Networks on Chip
The Internet growth coupled with the variety of its services is creating an increasing need for multicast traffic support by backbone routers and packet switches. Recently, buffere...
Iria Varela Senin, Lotfi Mhamdi, Kees Goossens
IJCNN
2000
IEEE
15 years 4 months ago
Simulation of a Digital Neuro-Chip for Spiking Neural Networks
: Conventional hardware platforms are far from reaching real-time simulation requirements of complex spiking neural networks (SNN). Therefore we designed an accelerator board with ...
Tim Schönauer, S. Atasoy, N. Mehrtash, Heinri...
DATE
2003
IEEE
145views Hardware» more  DATE 2003»
15 years 5 months ago
Automated Bus Generation for Multiprocessor SoC Design
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
Kyeong Keol Ryu, Vincent John Mooney