497 search results - page 34 / 100 » A Network on Chip Architecture and Design Methodology |
120
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INTEGRATION
2008
14 years 12 months ago
2008
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
104
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DDECS
2008
IEEE
15 years 6 months ago
2008
IEEE
Abstract—In Network-on-Chip (NoC) application design, coreto-node mapping is an important but intractable optimization problem. In the paper, we use simulated annealing to tackle...
FAC
2008
14 years 12 months ago
2008
This paper presents a formal model and a systematic approach to the validation of communication tures at a high level of abstraction. This model is described mathematically by a fu...
DAC
2004
ACM
16 years 25 days ago
2004
ACM
Circuits using nano-meter technologies are becoming increasingly vulnerable to signal interference from multiple noise sources as well as radiation-induced soft errors. One way to...
115
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TC
2008
14 years 11 months ago
2008
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...