497 search results - page 38 / 100 » A Network on Chip Architecture and Design Methodology |
DATE
2002
IEEE
15 years 4 months ago
2002
IEEE
We consider the implication of deep sub-micron VLSI technology on the design of communication frameworks for parallel DSP systems-on-chip. We assert that distributed data transfer...
DAC
2005
ACM
16 years 25 days ago
2005
ACM
The increased deployment of System-on-Chip designs has drawn attention to the limitations of on-chip interconnects. As a potential solution to these limitations, Networks-on -Chip...
115
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VLSID
2000
IEEE
15 years 3 months ago
2000
IEEE
We address the problem of verifying the correctness of pre-silicon models of a microprocessor. We touch on the latest advances in this area by considering two different aspects of...
MICRO
2010
IEEE
14 years 9 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
ERSA
2006
15 years 1 months ago
2006
Abstract-- In heterogeneous tiled System-on-Chip architectures a Network-on-Chip is used to transport messages between processing elements. A reconfigurable network interface is us...