As the CMOS technology enters the deep submicron design era, the lateral inter-wire coupling capacitance becomes the dominant part of load capacitance and makes RC delay on the bu...
REX is a program that extracts parasitic resistance and capacitance values for nodes in VLSI layouts. REX also performs network serial and parallel simplifications. Two types of n...
As the complexity of nowadays systems continues to grow, we are moving away from creating individual components from scratch, toward methodologies that emphasize composition of re...
Radu Marculescu, Jan M. Rabaey, Alberto L. Sangiov...
In the context of FPGAs, system downgrade consists in preventing the update of the hardware configuration or in replaying an old bitstream. The objective can be to preclude a syst...
At-speed testing of high-speed circuits is becoming increasingly difficult with external testers due to the growing gap between design and tester performance, growing cost of high...