497 search results - page 49 / 100 » A Network on Chip Architecture and Design Methodology |
ASAP
2010
IEEE
15 years 1 months ago
2010
IEEE
In a traditional Network-on-Chip (NoC), latency and power dissipation increase with system size due to its inherent multi-hop communications. The performance of NoC communication ...
MICRO
2006
IEEE
15 years 5 months ago
2006
IEEE
The advent of deep sub-micron technology has recently highlighted the criticality of the on-chip interconnects. As diminishing feature sizes have led to increases in global wiring...
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IWSOC
2005
IEEE
15 years 5 months ago
2005
IEEE
A fully programmable radio baseband processor architecture is presented. The architecture is based on a DSP processor core and a number flexible accelerators, connected via a con...
AINA
2007
IEEE
15 years 6 months ago
2007
IEEE
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...
ISCA
2005
IEEE
15 years 5 months ago
2005
IEEE
Network Intrusion Detection and Prevention Systems have emerged as one of the most effective ways of providing security to those connected to the network, and at the heart of alm...