497 search results - page 58 / 100 » A Network on Chip Architecture and Design Methodology |
ICC
2007
IEEE
15 years 6 months ago
2007
IEEE
—The use of adaptively-routed wormhole switched k-ary n-cubes has been motivated by the high path diversity provided by the rich topology of this family of interconnection networ...
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WOSP
2005
ACM
15 years 5 months ago
2005
ACM
Software performance based on performance models can be applied at early phases of the software development cycle to characterize the quantitative behavior of software systems. We...
ISCAS
2005
IEEE
15 years 5 months ago
2005
IEEE
Abstract- This paper describes the implementation of an areaefficient and protected user memory-mapped network interface, the pbuf (Parcel Buffer), for the Data IntensiVe Architect...
DAC
2000
ACM
16 years 24 days ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
SLIP
2006
ACM
15 years 5 months ago
2006
ACM
A fundamental difference between ASICs and FPGAs is that wires in ASICs are designed such that it matches the requirements of a particular design. Wire parameters such as: length...