497 search results - page 5 / 100 » A Network on Chip Architecture and Design Methodology |
75
Voted
ASAP
2003
IEEE
15 years 2 months ago
2003
IEEE
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
DAC
1999
ACM
15 years 1 months ago
1999
ACM
ion model or flexible PCB solutions cannot offer a valid solution for the next millinium SoCs . James G. Dougherty, Integrated Systems Silicon LTD, Belfast, Northern Ireland ISS an...
ICCD
2004
IEEE
15 years 6 months ago
2004
IEEE
In this paper we describe how Network-on-Chip (NoC) will be the next major challenge to implementing complex and function-rich applications in advanced manufacturing processes at ...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
SBACPAD
2007
IEEE
15 years 3 months ago
2007
IEEE
In this paper, an adaptive wormhole router for a flexible on-chip interconnection network is proposed and implemented for a Chip-Multi Processor (CMP). It adopts a wormhole switc...