497 search results - page 60 / 100 » A Network on Chip Architecture and Design Methodology |
102
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CODES
2006
IEEE
15 years 3 months ago
2006
IEEE
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
CDES
2006
15 years 1 months ago
2006
: As we continue miniaturization of circuits into nano-scale, interconnects have been recognized as the limiting factor for next generation of computing structures. To increase the...
RAS
2010
14 years 10 months ago
2010
This paper presents a development methodology for complex robotic systems using the behavior-based control architecture iB2C (integrated Behavior-Based Control). It is shown how a...
109
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RSP
1998
IEEE
15 years 4 months ago
1998
IEEE
This paper presents an algorithm for the automatic mapping of problem specifications to existing architecture templates. The proposed methodology supports the combination of exist...
ISCAS
2006
IEEE
15 years 5 months ago
2006
IEEE
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...