497 search results - page 63 / 100 » A Network on Chip Architecture and Design Methodology |
DAC
2007
ACM
16 years 24 days ago
2007
ACM
With increasing time-to-market pressure and shortening semiconductor product cycles, more and more chips are being designed with library-based methodologies. In spite of this shif...
113
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ISQED
2006
IEEE
15 years 5 months ago
2006
IEEE
— With advanced VLSI manufacturing technology in deep submicron (DSM) regime, we can integrate entire electronic systems on a single chip (SoC). Due to the complexity in SoC desi...
DSN
2004
IEEE
15 years 3 months ago
2004
IEEE
Advanced molecular nanotechnology devices are expected to have exceedingly high transient fault rates and large numbers of inherent device defects compared to conventional CMOS de...
100
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NOCS
2009
IEEE
15 years 6 months ago
2009
IEEE
This paper presents a many-core heterogeneous computational platform that employs a GALS compatible circuit-switched on-chip network. The platform targets streaming DSP and embedd...
122
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HPCA
2009
IEEE
16 years 10 days ago
2009
IEEE
Network-on-Chips (NoCs) are quite latency sensitive, since their communication latency strongly affects the application performance on recent many-core architectures. To reduce th...