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» A Network on Chip Architecture and Design Methodology
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105
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CASES
2006
ACM
15 years 5 months ago
Architecture and circuit techniques for low-throughput, energy-constrained systems across technology generations
Rising interest in the applications of wireless sensor networks has spurred research in the development of computing systems for lowthroughput, energy-constrained applications. Un...
Mark Hempstead, Gu-Yeon Wei, David Brooks
135
Voted
ATS
2001
IEEE
172views Hardware» more  ATS 2001»
15 years 3 months ago
A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters
Testing and diagnosis are important issues in system-onchip (SOC) development, as more and more embedded cores are being integrated into the chips. In this paper we propose a buil...
Chih-Wea Wang, Ruey-Shing Tzeng, Chi-Feng Wu, Chih...
DAC
2003
ACM
16 years 22 days ago
Design techniques for sensor appliances: foundations and light compass case study
We propose the first systematic, sensor-centric approach for quantitative design of sensor network appliances. We demonstrate its use by designing light appliance devices and the ...
Jennifer L. Wong, Seapahn Megerian, Miodrag Potkon...
ISCA
2007
IEEE
143views Hardware» more  ISCA 2007»
15 years 6 months ago
Interconnect design considerations for large NUCA caches
The ever increasing sizes of on-chip caches and the growing domination of wire delay necessitate significant changes to cache hierarchy design methodologies. Many recent proposal...
Naveen Muralimanohar, Rajeev Balasubramonian
CDC
2008
IEEE
128views Control Systems» more  CDC 2008»
15 years 6 months ago
Time-robust discrete control over networked Loosely Time-Triggered Architectures
In this paper we consider Loosely Time-Triggered Architectures (LTTA) as a networked infrastructure for deploying discrete control. LTTA are distributed architectures in which 1/ ...
Paul Caspi, Albert Benveniste