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» A Network on Chip Architecture and Design Methodology
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DAC
2002
ACM
16 years 22 days ago
Constraint-driven communication synthesis
Constraint-driven Communication Synthesis enables the automatic design of the communication architecture of a complex system from a library of pre-defined Intellectual Property (I...
Alessandro Pinto, Luca P. Carloni, Alberto L. Sang...
ISLPED
2003
ACM
83views Hardware» more  ISLPED 2003»
15 years 5 months ago
Leakage power modeling and optimization in interconnection networks
Power will be the key limiter to system scalability as interconnection networks take up an increasingly significant portion of system power. In this paper, we propose an architec...
Xuning Chen, Li-Shiuan Peh
ASAP
2007
IEEE
153views Hardware» more  ASAP 2007»
14 years 12 months ago
Performance Evaluation of Adaptive Routing Algorithms for achieving Fault Tolerance in NoC Fabrics
Commercial designs are integrating from 10 to 100 embedded functional and storage blocks in a single system on chip (SoC) currently, and the number is likely to increase significa...
Haibo Zhu, Partha Pratim Pande, Cristian Grecu
ICCAD
2002
IEEE
141views Hardware» more  ICCAD 2002»
15 years 8 months ago
A hierarchical modeling framework for on-chip communication architectures
— The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...
Xinping Zhu, Sharad Malik
ICDE
2006
IEEE
206views Database» more  ICDE 2006»
16 years 1 months ago
Query Co-Processing on Commodity Hardware
The rapid increase in the data volumes for the past few decades has intensified the need for high processing power for database and data mining applications. Researchers have acti...
Anastassia Ailamaki, Naga K. Govindaraju, Dinesh M...