497 search results - page 6 / 100 » A Network on Chip Architecture and Design Methodology |
DAC
2001
ACM
16 years 19 days ago
2001
ACM
Milenko Drinic UCLA Computer Science Dep. 4732 Boelter Hall Los Angeles, CA 90095-1596 milenko@cs.ucla.edu Darko Kirovski Microsoft Research One Microsoft Way Redmond, WA 98052 da...
ISPD
1999
ACM
15 years 4 months ago
1999
ACM
This paper presents a methodology to analyze signal integrity such as power voltage drop and clock skew in early stages of design, more specifically, when RTL-design and early flo...
ISSS
2002
IEEE
15 years 4 months ago
2002
IEEE
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
97
Voted
AHS
2007
IEEE
15 years 3 months ago
2007
IEEE
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
99
Voted
ISLPED
2005
ACM
15 years 5 months ago
2005
ACM
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. The individual components of the...