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» A Network on Chip Architecture and Design Methodology
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HPCA
2008
IEEE
15 years 10 months ago
Regional congestion awareness for load balance in networks-on-chip
Interconnection networks-on-chip (NOCs) are rapidly replacing other forms of interconnect in chip multiprocessors and system-on-chip designs. Existing interconnection networks use...
Paul Gratz, Boris Grot, Stephen W. Keckler
MICRO
2008
IEEE
119views Hardware» more  MICRO 2008»
15 years 3 months ago
The StageNet fabric for constructing resilient multicore systems
Scaling of CMOS feature size has long been a source of dramatic performance gains. However, the reduction in voltage levels has not been able to match this rate of scaling, leadin...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason ...
FLAIRS
2003
14 years 11 months ago
Advantages of Brahms for Specifying and Implementing a Multiagent Human-Robotic Exploration System
We have developed a model-based, distributed architecture that integrates diverse components in a system designed for lunar and planetary surface operations: an astronaut’s spac...
William J. Clancey, Maarten Sierhuis, Charis Kaski...
IPSN
2004
Springer
15 years 2 months ago
The impact of spatial correlation on routing with compression in wireless sensor networks
The efficacy of data aggregation in sensor networks is a function of the degree of spatial correlation in the sensed phenomenon. While several data aggregation (i.e., routing with...
Sundeep Pattem, Bhaskar Krishnamachari, Ramesh Gov...
MOBISYS
2004
ACM
15 years 9 months ago
Impact of Radio Irregularity on Wireless Sensor Networks
In this paper, we investigate the impact of radio irregularity on the communication performance in wireless sensor networks. Radio irregularity is a common phenomenon which arises...
Gang Zhou, Tian He, Sudha Krishnamurthy, John A. S...