465 search results - page 28 / 93 » A New Approach for Low Power Scan Testing |
95
Voted
ISCAS
2005
IEEE
15 years 9 months ago
2005
IEEE
— A new architecture of a fractional-N phase-locked loop (PLL) frequency synthesizer is presented in this paper. The unique feature of the proposed frequency synthesizer is a loo...
127
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ICCD
2008
IEEE
16 years 1 months ago
2008
IEEE
—Dynamic voltage scaling (DVS) provides power savings for systems with varying performance requirements. One low overhead implementation of DVS uses PMOS power switches to connec...
129
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ERSA
2008
15 years 5 months ago
2008
For two decades, reconfigurable computing systems have provided an attractive alternative to fixed hardware solutions. Reconfigurable computing systems have demonstrated the low c...
129
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HICSS
2008
IEEE
15 years 10 months ago
2008
IEEE
1 This paper discusses measurements of the dynamic performance of electric power Phasor Measurement Units, PMUs, and their relation to the requirements of the IEEE Synchrophasor St...
148
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DCC
2008
IEEE
16 years 3 months ago
2008
IEEE
A novel object-based fractal monocular and stereo video compression scheme with quadtree-based motion and disparity compensation is proposed in this paper. Fractal coding is adopte...