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» A New Approach for Low Power Scan Testing
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VLSID
2006
IEEE
169views VLSI» more  VLSID 2006»
15 years 10 months ago
A Low Leakage and SNM Free SRAM Cell Design in Deep Sub Micron CMOS Technology
As the IC process technology scales, the oxide thickness and operating voltage continues to decrease. The gate oxide thickness in recent and future IC process technology has appro...
Sanjeev K. Jain, Pankaj Agarwal
DATE
2006
IEEE
126views Hardware» more  DATE 2006»
15 years 10 months ago
Analysis and modeling of power grid transmission lines
Power distribution and signal transmission are becoming key limiters for chip performance in nanometer era. These issues can be simultaneously addressed by designing transmission ...
J. Balachandran, Steven Brebels, G. Carchon, T. We...
ICDAR
2003
IEEE
15 years 9 months ago
An Approach to Extracting the Target Text Line from a Document Image Captured by a Pen Scanner
In this paper, we present a new approach to extracting the target text line from a document image captured by a pen scanner. Given the binary image, a set of possible text lines a...
Zhen-Long Bai, Qiang Huo
SDM
2009
SIAM
175views Data Mining» more  SDM 2009»
16 years 1 months ago
Low-Entropy Set Selection.
Most pattern discovery algorithms easily generate very large numbers of patterns, making the results impossible to understand and hard to use. Recently, the problem of instead sel...
Hannes Heikinheimo, Jilles Vreeken, Arno Siebes, H...
GLVLSI
2003
IEEE
132views VLSI» more  GLVLSI 2003»
15 years 9 months ago
A highly regular multi-phase reseeding technique for scan-based BIST
In this paper a novel reseeding architecture for scan-based BIST, which uses an LFSR as TPG, is proposed. Multiple cells of the LFSR are utilized as sources for feeding the scan c...
Emmanouil Kalligeros, Xrysovalantis Kavousianos, D...