Sciweavers

3481 search results - page 156 / 697
» A New Approach to Component Testing
Sort
View
73
Voted
VTS
2002
IEEE
126views Hardware» more  VTS 2002»
15 years 3 months ago
On Using Rectangle Packing for SOC Wrapper/TAM Co-Optimization
The testing time for a system-on-chip (SOC) is determined to a large extent by the design of test wrappers and the test access mechanism (TAM). Wrapper/TAM co-optimization is ther...
Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan M...
ISQED
2006
IEEE
101views Hardware» more  ISQED 2006»
15 years 4 months ago
Compiler-Directed Power Density Reduction in NoC-Based Multi-Core Designs
As transistor counts keep increasing and clock frequencies rise, high power consumption is becoming one of the most important obstacles, preventing further scaling and performance...
Sri Hari Krishna Narayanan, Mahmut T. Kandemir, Oz...
PRL
2006
117views more  PRL 2006»
14 years 10 months ago
Improving image segmentation quality through effective region merging using a hierarchical social metaheuristic
This paper proposes a new evolutionary region merging method in order to efficiently improve segmentation quality results. Our approach starts from an oversegmented image, which is...
Abraham Duarte, Miguel Ángel Sánchez...
95
Voted
EURODAC
1995
IEEE
164views VHDL» more  EURODAC 1995»
15 years 1 months ago
Bottleneck removal algorithm for dynamic compaction and test cycles reduction
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...
Srimat T. Chakradhar, Anand Raghunathan
91
Voted
ICASSP
2011
IEEE
14 years 1 months ago
Adaptive harmonic time-frequency decomposition of audio using shift-invariant PLCA
This paper presents a new algorithm based on shift-invariant probabilistic latent component analysis that analyzes harmonic structures in an audio signal. Each note in a constant-...
Benoit Fuentes, Roland Badeau, Gaël Richard