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» A New Era of Performance Evaluation
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ISCA
1996
IEEE
99views Hardware» more  ISCA 1996»
15 years 6 months ago
High-Bandwidth Address Translation for Multiple-Issue Processors
In an effort to push the envelope of system performance, microprocessor designs are continually exploiting higher levels of instruction-level parallelism, resulting in increasing ...
Todd M. Austin, Gurindar S. Sohi
HPCA
2006
IEEE
16 years 2 months ago
LogTM: log-based transactional memory
Transactional memory (TM) simplifies parallel programming by guaranteeing that transactions appear to execute atomically and in isolation. Implementing these properties includes p...
Kevin E. Moore, Jayaram Bobba, Michelle J. Moravan...
EUROSYS
2009
ACM
15 years 11 months ago
Ksplice: automatic rebootless kernel updates
Ksplice allows system administrators to apply patches to their operating system kernels without rebooting. Unlike previous hot update systems, Ksplice operates at the object code ...
Jeff Arnold, M. Frans Kaashoek
MSS
2005
IEEE
112views Hardware» more  MSS 2005»
15 years 7 months ago
Violin: A Framework for Extensible Block-Level Storage
Storage virtualization is becoming more and more important due to the increasing gap between application requirements and the limited functionality offered by storage systems. In...
Michail Flouris, Angelos Bilas
SOSP
2007
ACM
15 years 10 months ago
Triage: diagnosing production run failures at the user's site
Diagnosing production run failures is a challenging yet important task. Most previous work focuses on offsite diagnosis, i.e. development site diagnosis with the programmers prese...
Joseph Tucek, Shan Lu, Chengdu Huang, Spiros Xanth...