83 search results - page 2 / 17 » A New Finite-Field Multiplier Using Redundant Representation |
73
Voted
APCCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
—The Massey-Omura multiplier is a well-known sequential multiplier over finite fields GF(2m ), which can perform multiplication in m clock cycles for the normal basis. In this ar...
78
Voted
ARITH
2007
IEEE
15 years 4 months ago
2007
IEEE
This paper introduces two novel architectures for parallel decimal multipliers. Our multipliers are based on a new algorithm for decimal carry–save multioperand addition that us...
ARITH
2009
IEEE
15 years 4 months ago
2009
IEEE
Hardware implementation of all the basic radix-10 arithmetic operations is evolving as a new trend in the design and implementation of general purpose digital processors. Redundan...
ICCD
2004
IEEE
15 years 6 months ago
2004
IEEE
Decimal arithmetic is regaining popularity in the computing community due to the growing importance of commercial, financial, and Internet-based applications, which process decima...
102
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ICASSP
2011
IEEE
14 years 1 months ago
2011
IEEE
This paper presents a new wavelet based retrieval approach based on Spherically Invariant Random Vector (SIRV) modeling of wavelet subbands. Under this multivariate model, wavelet...