Sciweavers

2336 search results - page 419 / 468
» A New Parallel Genetic Algorithm
Sort
View
HPCA
2002
IEEE
16 years 5 days ago
Quantifying Load Stream Behavior
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
Suleyman Sair, Timothy Sherwood, Brad Calder
CISS
2008
IEEE
15 years 6 months ago
On wireless network scheduling with intersession network coding
Abstract—Cross-layer optimization including congestion control, routing, and scheduling has shown dramatic throughput improvement over layered designs for wireless networks. In p...
Chih-Chun Wang, Ness B. Shroff
CONCUR
2007
Springer
15 years 6 months ago
Timed Concurrent Game Structures
Abstract. We propose a new model for timed games, based on concurrent game structures (CGSs). Compared to the classical timed game automata of Asarin et al. [8], our timed CGSs are...
Thomas Brihaye, François Laroussinie, Nicol...
ICPADS
2006
IEEE
15 years 5 months ago
Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems
—Recently, high-end reconfigurable computing systems that employ Field-Programmable Gate Arrays (FPGAs) as hardware accelerators for general-purpose processors have been built. T...
Ling Zhuo, Viktor K. Prasanna
ISPDC
2006
IEEE
15 years 5 months ago
How to Achieve High Throughput with Dynamic Tree-Structured Coterie
Data replication permits a better network bandwidth utilization and minimizes the effect of latency in large-scale systems such as computing grids. However, the cost of maintainin...
Ivan Frain, Abdelaziz Mzoughi, Jean Paul Bahsoun