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CCECE
2006
IEEE
15 years 4 months ago
FPGA-Based SAT Solver
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...
Mona Safar, M. Watheq El-Kharashi, Ashraf Salem
CRV
2005
IEEE
201views Robotics» more  CRV 2005»
15 years 3 months ago
Minimum Bayes Error Features for Visual Recognition by Sequential Feature Selection and Extraction
The extraction of optimal features, in a classification sense, is still quite challenging in the context of large-scale classification problems (such as visual recognition), inv...
Gustavo Carneiro, Nuno Vasconcelos
VLSID
2005
IEEE
97views VLSI» more  VLSID 2005»
15 years 3 months ago
Q-PREZ: QBF Evaluation Using Partition, Resolution and Elimination with ZBDDs
In recent years, there has been an increasing interest in Quantified Boolean Formula (QBF) evaluation, since several VLSI CAD problems can be formulated efficiently as QBF insta...
Kameshwar Chandrasekar, Michael S. Hsiao
IWINAC
2005
Springer
15 years 3 months ago
The Allele Meta-model - Developing a Common Language for Genetic Algorithms
Abstract. Due to the lot of different Genetic Algorithm variants, encodings, and attacked problems, very little general theory is available to explain the internal functioning of ...
Stefan Wagner 0002, Michael Affenzeller
EUROPAR
2003
Springer
15 years 3 months ago
Why Not Use a Pattern-Based Parallel Programming System?
Parallel programming is seen as an effective technique to improve the performance of computationally-intensive programs. This is done at the cost of increasing the complexity of t...
John Anvik, Jonathan Schaeffer, Duane Szafron, Kai...