Abstract—We present a new low-level interfacing scheme for connecting custom accelerators to processors that tolerates latencies that usually occur when accessing hardware accele...
Jaroslav Sykora, Leos Kafka, Martin Danek, Lukas K...
Clustered architectures are a solution to the bottleneck of centralized register files in superscalar and VLIW processors. The main challenge associated with clustered architectu...
Tracing algorithms visit reachable nodes in a graph and are central to activities such as garbage collection, marshalling etc. Traditional sequential algorithms use a worklist, re...
- We previously proposed a new 3D form display actuated by shape memory alloy (SMA), which is capable of displaying large scale objects sequentially. Based on our devised method, o...
Masashi Nakatani, Hiroyuki Kajimoto, Kevin Vlack, ...
As multi-core processor systems become more and more widespread, the demand for efficient parallel algorithms also propagates into the field of computer graphics. This is especial...
Bernhard Thomaszewski, Simon Pabst, Wolfgang Bloch...