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DSD
2011
IEEE
200views Hardware» more  DSD 2011»
12 years 6 months ago
Microthreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors
Abstract—We present a new low-level interfacing scheme for connecting custom accelerators to processors that tolerates latencies that usually occur when accessing hardware accele...
Jaroslav Sykora, Leos Kafka, Martin Danek, Lukas K...
PLDI
2003
ACM
13 years 11 months ago
Region-based hierarchical operation partitioning for multicluster processors
Clustered architectures are a solution to the bottleneck of centralized register files in superscalar and VLIW processors. The main challenge associated with clustered architectu...
Michael L. Chu, Kevin Fan, Scott A. Mahlke
IWMM
2009
Springer
152views Hardware» more  IWMM 2009»
14 years 25 days ago
A new approach to parallelising tracing algorithms
Tracing algorithms visit reachable nodes in a graph and are central to activities such as garbage collection, marshalling etc. Traditional sequential algorithms use a worklist, re...
Cosmin E. Oancea, Alan Mycroft, Stephen M. Watt
ICRA
2005
IEEE
171views Robotics» more  ICRA 2005»
13 years 12 months ago
Control Method for a 3D Form Display with Coil-type Shape Memory Alloy
- We previously proposed a new 3D form display actuated by shape memory alloy (SMA), which is capable of displaying large scale objects sequentially. Based on our devised method, o...
Masashi Nakatani, Hiroyuki Kajimoto, Kevin Vlack, ...
CG
2008
Springer
13 years 6 months ago
Parallel techniques for physically based simulation on multi-core processor architectures
As multi-core processor systems become more and more widespread, the demand for efficient parallel algorithms also propagates into the field of computer graphics. This is especial...
Bernhard Thomaszewski, Simon Pabst, Wolfgang Bloch...