309 search results - page 43 / 62 » A New Synthesis of Symmetric Functions |
ICCAD
2004
IEEE
15 years 6 months ago
2004
IEEE
— This paper presents Hermes, a depth-optimal LUT based FPGA mapping algorithm. The presented algorithm is based on a new strategy for finding LUTs allowing to find a good LUT ...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
—Redundancy Addition and Removal (RAR) is a restructuring technique used in the synthesis and optimization of logic designs. It can remove an existing target wire and add an alte...
TPHOL
2006
IEEE
15 years 3 months ago
2006
IEEE
We extract on the computer a number of moduli of uniform continuity for the first few elements of a sequence of closed terms t of G¨odel’s T of type (N→N)→(N→N). The gen...
RSP
2005
IEEE
15 years 3 months ago
2005
IEEE
Our software synthesis tool, CSP++, generates C++ source code from verifiable CSPm specifications, and includes a framework for runtime execution. Our technique of selective for...
VLSI
2005
Springer
15 years 3 months ago
2005
Springer
Quasi delay insensitive circuits are functionally independent of delays in gates and wires (except for some particular wires). Such asynchronous circuits offer high robustness but...