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» A New Synthesis of Symmetric Functions
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BMCBI
2011
14 years 1 months ago
RAG: An Update to the RNA-As-Graphs Resource
Background: In 2004, we presented a web resource for stimulating the search for novel RNAs, RNA-As-Graphs (RAG), which classified, catalogued, and predicted RNA secondary structur...
Joseph A. Izzo, Namhee Kim, Shereef Elmetwaly, Tam...
ICES
2001
Springer
107views Hardware» more  ICES 2001»
15 years 2 months ago
Polymorphic Electronics
This paper introduces the concept of polymorphic electronics (polytronics) –referring to electronics with superimposed built-in functionality. A function change does not require ...
Adrian Stoica, Ricardo Salem Zebulum, Didier Keyme...
ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
15 years 3 months ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
DAC
2010
ACM
15 years 1 months ago
LUT-based FPGA technology mapping for reliability
As device size shrinks to the nanometer range, FPGAs are increasingly prone to manufacturing defects. We anticipate that the ability to tolerate multiple defects will be very impo...
Jason Cong, Kirill Minkovich
ARVLSI
1995
IEEE
220views VLSI» more  ARVLSI 1995»
15 years 1 months ago
Optimization of combinational and sequential logic circuits for low power using precomputation
Precomputation is a recently proposed logic optimization technique which selectively disables the inputs of a sequential logic circuit, thereby reducing switching activity and pow...
José Monteiro, John Rinderknecht, Srinivas ...