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VTC
2008
IEEE
124views Communications» more  VTC 2008»
15 years 10 months ago
Long Length LDPC Code Construction and the Corresponding Decoder Implementation with Adjustable Parallelism
—In this paper, we propose a class of implementation friendly structured LDPC codes with low error floors. The proposed codes exhibit no apparent error floors as compared with qu...
Chia-Yu Lin, Mong-Kai Ku, Yi-Hsing Chien
IPPS
1999
IEEE
15 years 8 months ago
Parallel Out-of-Core Divide-and-Conquer Techniques with Application to Classification Trees
Classification is an important problem in the field of data mining. Construction of good classifiers is computationally intensive and offers plenty of scope for parallelization. D...
Mahesh K. Sreenivas, Khaled Alsabti, Sanjay Ranka
IPPS
2006
IEEE
15 years 10 months ago
Parallel implementation and performance characterization of MUSCLE
Multiple sequence alignment is a fundamental and very computationally intensive task in molecular biology. MUSCLE, a new algorithm for creating multiple alignments of protein sequ...
Xi Deng, Eric Li, Jiulong Shan, Wenguang Chen
DATE
2000
IEEE
140views Hardware» more  DATE 2000»
15 years 8 months ago
Parallel and Distributed VHDL Simulation
This paper presents a methodology for parallel and distributed simulation of VHDL using the PDES (parallel discrete-event simulation) paradigm. To achieve better features and perf...
Dragos Lungeanu, C.-J. Richard Shi
ICASSP
2008
IEEE
15 years 10 months ago
Implementation of message-passing algorithms for the acquisition of spreading codes
A new technique to acquire pseudo-noise (PN) sequences has been recently proposed in [1] and [2]. It is based on the paradigm of iterative Message Passing (iMP) to be run on loopy...
Massimo Rovini, Fabio Principe, Luca Fanucci, Marc...