502 search results - page 69 / 101 » A Parallel GPSS Based on the ParaSol Simulation System |
86
Voted
CASES
2008
ACM
14 years 11 months ago
2008
ACM
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
IPCCC
2006
IEEE
15 years 3 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
MICRO
2010
IEEE
14 years 8 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
GRID
2007
Springer
15 years 3 months ago
2007
Springer
Application scheduling studies on large-scale shared resources have advocated the use of resource provisioning in the form of advance reservations for providing predictable and de...
74
Voted
ICDCS
2006
IEEE
15 years 3 months ago
2006
IEEE
In IEEE 802.11 based ad hoc networks, by simply manipulating the back-off timers and/or wait times prior to transmission, malicious nodes can cause a drastically reduced allocatio...