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DBKDA
2010
IEEE
127views Database» more  DBKDA 2010»
13 years 4 months ago
Failure-Tolerant Transaction Routing at Large Scale
—Emerging Web2.0 applications such as virtual worlds or social networking websites strongly differ from usual OLTP applications. First, the transactions are encapsulated in an AP...
Idrissa Sarr, Hubert Naacke, Stéphane Gan&c...
ISCI
1998
193views more  ISCI 1998»
13 years 6 months ago
A Parallel Implementation of Genetic Programming that Achieves Super-Linear Performance
: This paper describes the successful parallel implementation of genetic programming on a network of processing nodes using the transputer architecture. With this approach, researc...
David Andre, John R. Koza
DATE
2002
IEEE
103views Hardware» more  DATE 2002»
13 years 11 months ago
Communication Mechanisms for Parallel DSP Systems on a Chip
We consider the implication of deep sub-micron VLSI technology on the design of communication frameworks for parallel DSP systems-on-chip. We assert that distributed data transfer...
Joseph Williams, Nevin Heintze, Bryan D. Ackland
PARELEC
2006
IEEE
14 years 8 days ago
Hierarchical Partitioning for Piecewise Linear Algorithms
processor arrays can be used as accelerators for a plenty of data flow-dominant applications. The explosive growth in research and development of massively parallel processor arr...
Hritam Dutta, Frank Hannig, Jürgen Teich
PPOPP
2009
ACM
14 years 6 months ago
Solving dense linear systems on platforms with multiple hardware accelerators
In a previous paper we show how the FLAME methods and tools provide a solution to compute dense dense linear algebra operations on a multi-GPU platform with reasonable performance...
Enrique S. Quintana-Ortí, Francisco D. Igua...