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» A Parallel Programming Style and Its Algebra of Programs
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LCTRTS
2007
Springer
15 years 3 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier
ICS
2003
Tsinghua U.
15 years 2 months ago
Inferential queueing and speculative push for reducing critical communication latencies
Communication latencies within critical sections constitute a major bottleneck in some classes of emerging parallel workloads. In this paper, we argue for the use of Inferentially...
Ravi Rajwar, Alain Kägi, James R. Goodman
ECOOPW
2007
Springer
15 years 1 months ago
Enabling Software Evolution Via AOP and Reflection
Following last three years' RAM-SE (Reflection, AOP and Meta-Data for Software Evolution) workshop at the ECOOP conference, the RAM-SE'07 workshop was a successful and po...
Manuel Oriol, Walter Cazzola, Shigeru Chiba, Gunte...
ICDCS
2010
IEEE
15 years 1 months ago
New Algorithms for Planning Bulk Transfer via Internet and Shipping Networks
—Cloud computing is enabling groups of academic collaborators, groups of business partners, etc., to come together in an ad-hoc manner. This paper focuses on the group-based data...
Brian Cho, Indranil Gupta
77
Voted
DAC
2008
ACM
14 years 11 months ago
Application mapping for chip multiprocessors
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
Guangyu Chen, Feihui Li, Seung Woo Son, Mahmut T. ...