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» A Parametrical Architecture for Reed-Solomon Decoders
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78
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GLVLSI
1996
IEEE
103views VLSI» more  GLVLSI 1996»
15 years 3 months ago
A Parametrical Architecture for Reed-Solomon Decoders
Mariana-Eugenia Petre, Guido Masera
ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
15 years 4 months ago
High-speed VLSI architecture for parallel Reed-Solomon decoder
—This paper presents high-speed parallel Reed–Solomon (RS) (255,239) decoder architecture using modified Euclidean algorithm for the high-speed multigigabit-per-second fiber op...
Hanho Lee
ICCD
2006
IEEE
113views Hardware» more  ICCD 2006»
15 years 7 months ago
High-speed Factorization Architecture for Soft-decision Reed-Solomon Decoding
Reed-Solomon (RS) codes are among the most widely utilized error-correcting codes in modern communication and computer systems. Among the decoding algorithms of RS codes, the rece...
Xinmiao Zhang
101
Voted
FPGA
2006
ACM
195views FPGA» more  FPGA 2006»
15 years 2 months ago
An adaptive Reed-Solomon errors-and-erasures decoder
The development of Reed-Solomon (RS) codes has allowed for improved data transmission over a variety of communication media. Although Reed-Solomon decoding provides a powerful def...
Lilian Atieno, Jonathan Allen, Dennis Goeckel, Rus...
94
Voted
DSD
2006
IEEE
116views Hardware» more  DSD 2006»
15 years 5 months ago
Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard
This paper addresses the implementation of ReedSolomon decoding for battery-powered wireless devices. The scope of this paper is constrained by the Digital Media Broadcasting (DMB...
Arjan C. Dam, Michel G. J. Lammertink, Kenneth C. ...