33 search results - page 3 / 7 » A Pattern Generation Technique for Maximizing Power Supply C... |
129
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TIM
2010
14 years 4 months ago
2010
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
HPCA
2003
IEEE
15 years 10 months ago
2003
IEEE
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
ISQED
2007
IEEE
15 years 3 months ago
2007
IEEE
Soft error due to ionizing radiation is emerging as a major concern for future technologies. The measurement unit for failures due to soft errors is called Failure-In-Time (FIT) t...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
— Market and customer demands have continued to push the limits of CMOS performance. At-speed test has become a common method to ensure these high performance chips are being shi...
100
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ICC
2007
IEEE
14 years 9 months ago
2007
IEEE
Abstract— A clear deficiency in most of todays Anomaly Intrusion Detection Systems (AIDS) is their inability to distinguish between a new form of legitimate normal behavior and ...