Sciweavers

1391 search results - page 179 / 279
» A Performance Interface for Component-Based Applications
Sort
View
107
Voted
IPPS
1995
IEEE
15 years 7 months ago
The RACE network architecture
The RACE R parallel computer system provides a highperformance parallel interconnection network at low cost. This paper describes the architecture and implementation of the RACE ...
Bradley C. Kuszmaul
CAMAD
2006
IEEE
15 years 5 months ago
Nessi: a python network simulator for fast protocol development
A new and simple network simulator Nessi is described in this paper. While other simulators focus on minimizing the simulation time, Nessi tries to minimize the development time an...
Jérôme Vernez, Jürgen Ehrensberg...
160
Voted
CCGRID
2006
IEEE
15 years 5 months ago
Integrating Logical and Physical File Models in the MPI-IO Implementation for "Clusterfile"
This paper presents the design and implementation of the MPI-IO interface for the Clusterfile parallel file system. The approach offers the opportunity of achieving a high corelat...
Florin Isaila, David E. Singh, Jesús Carret...
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
15 years 5 months ago
Runtime Filesystem Support for Reconfigurable FPGA Hardware Processes in BORPH
This paper presents the design of BORPH's file system layer for FPGA-based reconfigurable computers. BORPH provides user FPGA designs that execute as hardware processes acces...
Hayden Kwok-Hay So, Robert W. Brodersen
116
Voted
LREC
2008
76views Education» more  LREC 2008»
15 years 5 months ago
Smarty - Extendable Framework for Bilingual and Multilingual Comprehension Assistants
This paper discusses a framework for development of bilingual and multilingual comprehension assistants and presents a prototype implementation of an English-Bulgarian comprehensi...
Todor Arnaudov, Ruslan Mitkov