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» A Permutation Approach to Validation
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FDL
2008
IEEE
15 years 1 months ago
Scenario-based Validation of Embedded Systems
This paper describes a scenario-based methodology em-level design validation based on the Abstract State Machines formal method. This scenario-based approach complements an existi...
Angelo Gargantini, Elvinia Riccobene, Patrizia Sca...
ACL
2004
15 years 1 months ago
Finding Ideographic Representations of Japanese Names Written in Latin Script via Language Identification and Corpus Validation
Multilingual applications frequently involve dealing with proper names, but names are often missing in bilingual lexicons. This problem is exacerbated for applications involving t...
Yan Qu, Gregory Grefenstette
CODES
2000
IEEE
15 years 4 months ago
Automatic test bench generation for simulation-based validation
In current design practice synthesis tools play a key role, letting designers to concentrate on the specificationof the system being designed by carrying out repetitive tasks such...
Marcello Lajolo, Luciano Lavagno, Maurizio Rebaude...
HICSS
2008
IEEE
120views Biometrics» more  HICSS 2008»
15 years 6 months ago
Exploring the Semantic Validity of Questionnaire Scales
Many behavioral researchers have been or are currently engaged in survey research, analyzing results using statistical methods. Respondents are often asked to fill out questionnai...
Kai R. Larsen, Dorit Nevo, Eliot Rich
DSD
2005
IEEE
116views Hardware» more  DSD 2005»
15 years 5 months ago
Validation of Embedded Systems Using Formal Method Aided Simulation
This paper proposes a validation approach, based on simulation, which addresses problems related to both state space explosion of formal methods and low coverage of informal metho...
Daniel Karlsson, Petru Eles, Zebo Peng