We present a framework for high-level design validation using an efficient register-transfer level (RTL) automatic test pattern generator (ATPG). The RTL ATPG generates the test ...
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
We present a tool for the design and validation of embedded real-time applications. The tool integrates two approaches, the use of the synchronous programming language ESTEREL for...
Frameworks and libraries that use annotations are becoming popular. However, there is not enough software engineering support for annotation development. In particular, the validat...
Abstract. We consider the problem of XML schema evolution preserving the validity of existing documents related to the original schema. The aim of such schema evolution is to fit ...