30 search results - page 3 / 6 » A Placement Methodology for Robust Clocking |
75
Voted
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
ISPD
1997
ACM
15 years 1 months ago
1997
ACM
- This paper reports on a highly effective methodology to construct complex high performance microprocessors. Critical aspects of the methodology include an integrated database for...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
95
Voted
DAC
2010
ACM
14 years 7 months ago
2010
ACM
Clock meshes are extremely effective at filtering clock skew from environmental and process variations. For this reason, clock meshes are used in most high performance designs. Ho...
ASPDAC
1999
ACM
15 years 1 months ago
1999
ACM
We describe a high performance clocking methodology for domino pipelines. Our technique maximizes the clock rate of the circular pipeline (“ring”) while maintaining the ring c...