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» A Polymorphic Hardware Platform
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DATE
2008
IEEE
100views Hardware» more  DATE 2008»
16 years 18 days ago
User-Aware Dynamic Task Allocation in Networks-on-Chip
In this paper, we propose a run-time strategy for allocating the application tasks to platform resources in homogeneous Networks-on-Chip (NoCs). As novel contribution, we incorpor...
Chen-Ling Chou, Radu Marculescu
ISCAS
2007
IEEE
122views Hardware» more  ISCAS 2007»
16 years 12 days ago
Neuromimetic ICs with analog cores: an alternative for simulating spiking neural networks
- This paper aims at discussing the implementation of simulation systems for SNN based on analog computation cores (neuromimetic ICs). Such systems are an alternative to completely...
Sylvie Renaud, Jean Tomas, Yannick Bornat, Adel Da...
ISCAS
2007
IEEE
136views Hardware» more  ISCAS 2007»
16 years 12 days ago
Flexible Low Power Probability Density Estimation Unit For Speech Recognition
— This paper describes the hardware architecture for a flexible probability density estimation unit to be used in a Large Vocabulary Speech Recognition System, and targeted for m...
Ullas Pazhayaveetil, Dhruba Chandra, Paul Franzon
FPL
2007
Springer
89views Hardware» more  FPL 2007»
16 years 8 days ago
Evolutionary Search Applied to Reconfigurable Analogue Control
The new breed of reconfigurable integrated circuits (ICs) offer switched-capacitor based analogue circuits whose functionality can be altered during run-time. Rapidly changing th...
Kester Clegg, Susan Stepney, Tim Clarke
DATE
2006
IEEE
135views Hardware» more  DATE 2006»
16 years 5 days ago
FPGA architecture characterization for system level performance analysis
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
Douglas Densmore, Adam Donlin, Alberto L. Sangiova...