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ISCA
2008
IEEE
112views Hardware» more  ISCA 2008»
16 years 1 months ago
Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems
In a chip-multiprocessor (CMP) system, the DRAM system is shared among cores. In a shared DRAM system, requests from a thread can not only delay requests from other threads by cau...
Onur Mutlu, Thomas Moscibroda
ICRA
2007
IEEE
108views Robotics» more  ICRA 2007»
16 years 1 months ago
Automated Tool Handling for the Trauma Pod Surgical Robot
— In order to enable robotic surgery without human assistance, a means must be developed to change tools. As part of the larger Trauma Pod Project, we developed the Tool Rack Sub...
Diana C. W. Friedman, Jesse Dosher, Tim Kowalewski...
GECCO
2009
Springer
193views Optimization» more  GECCO 2009»
15 years 11 months ago
Optimization of dynamic memory managers for embedded systems using grammatical evolution
New portable consumer embedded devices must execute multimedia applications (e.g., 3D games, video players and signal processing software, etc.) that demand extensive memory acces...
José L. Risco-Martín, David Atienza,...
MOBIHOC
2004
ACM
16 years 6 months ago
Towards mobility as a network control primitive
In the near future, the advent of large-scale networks of mobile agents autonomously performing long-term sensing and communication tasks will be upon us. However, using controlle...
David Kiyoshi Goldenberg, Jie Lin, A. Stephen Mors...
ECMDAFA
2005
Springer
130views Hardware» more  ECMDAFA 2005»
16 years 12 days ago
Control Flow Analysis of UML 2.0 Sequence Diagrams
This article presents a control flow analysis methodology based on UML 2.0 sequence diagrams (SD). In contrast to the conventional code-based control flow analysis techniques, thi...
Vahid Garousi, Lionel C. Briand, Yvan Labiche