62 search results - page 7 / 13 » A Practical Architecture for Reliable Quantum Computers |
CF
2004
ACM
15 years 5 months ago
2004
ACM
This paper presents a fault tolerant design technique for the clockless wave pipeline. The specific architectural model investigated in this paper is the two-phase clockless asyn...
DAC
1994
ACM
15 years 3 months ago
1994
ACM
Today's high-performance single-chip CMOS microprocessors are the most complex and challenging chip designs ever implemented. To stay on the leading edge, Digital's micro...
DAC
2007
ACM
15 years 3 months ago
2007
ACM
It has long been the practice to create models in C or C++ for architectural studies, software prototyping and RTL verification in the design of Systems-on-Chip (SoC). It is often...
WIRTSCHAFTSINFORMATI
2007
15 years 24 days ago
2007
To ensure the operability and reliability of large scale Enterprise Resource Planning Systems (ERP) and enterprise services, a peak-load oriented hardware sizing is often used, wh...
195
click to vote
DAC
2011
ACM
13 years 11 months ago
2011
ACM
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...