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MEMOCODE
2007
IEEE
15 years 5 months ago
Towards Equivalence Checking Between TLM and RTL Models
The always increasing complexity of digital system is overcome in design flows based on Transaction Level Modeling (TLM) by designing and verifying the system at difbstraction le...
Nicola Bombieri, Franco Fummi, Graziano Pravadelli...
ISCAS
2005
IEEE
133views Hardware» more  ISCAS 2005»
15 years 4 months ago
Multiobjective VLSI cell placement using distributed simulated evolution algorithm
— Simulated Evolution (SimE) is a sound stochastic approximation algorithm based on the principles of adaptation. If properly engineered it is possible for SimE to reach nearopti...
Sadiq M. Sait, Ali Mustafa Zaidi, Mustafa I. Ali
SBCCI
2004
ACM
127views VLSI» more  SBCCI 2004»
15 years 4 months ago
A formal software synthesis approach for embedded hard real-time systems
Software synthesis is defined as the task of translating a specification into a software program, in a general purpose language, in such a way that this software can be compiled...
Raimundo S. Barreto, Marília Neves, Meuse N...
FCT
2001
Springer
15 years 3 months ago
Best Increments for the Average Case of Shellsort
This paper presents the results of using sequential analysis to find increment sequences that minimize the average running time of Shellsort, for array sizes up to several thousan...
Marcin Ciura
MAM
2006
95views more  MAM 2006»
14 years 11 months ago
Stochastic spatial routing for reconfigurable networks
FPGA placement and routing is time consuming, often serving as the major obstacle inhibiting a fast edit-compile-test loop in prototyping and development and the major obstacle pr...
André DeHon, Randy Huang, John Wawrzynek